Analysis of 50 Hz Neutral-Point Voltage Fluctuation of 
DC-Link Capacitors for Three-level Inverters

Cheng Luo; Jianbo Cao; Mi Qi; Dapeng Lu; Hongwei Zhou

doi:doi:10.11648/j.ajee.20261404.11

Research Article |

| Peer-Reviewed

Analysis of 50 Hz Neutral-Point Voltage Fluctuation of DC-Link Capacitors for Three-level Inverters

Cheng Luo

, Jianbo Cao^*

, Mi Qi, Dapeng Lu, Hongwei Zhou

Published in American Journal of Energy Engineering (Volume 14, Issue 4)

Received: 2 September 2026 Accepted: 15 October 2026 Published: 10 November 2026

Views: Downloads:

Download PDF

Share This Article

Twitter
Linked In
Facebook

Abstract

Grid-tied inverters serve as key equipment to guarantee the reliable operation of modern power systems dominated by renewable energy sources. Under asymmetric grid conditions, injecting negative-sequence current is a widely adopted control strategy for three-level grid-connected inverters to suppress grid voltage unbalance. However, this paper discovers an unreported phenomenon that obvious 50 Hz fluctuations arise in the half DC-bus voltage of three-level inverters during negative-sequence current injection. To clarify the generation mechanism of this voltage fluctuation, Fourier series decomposition is employed to analyze the coupling relationship between sequence components of voltage and current. The theoretical analysis demonstrates that the interaction between negative-sequence voltage and negative-sequence current constitutes the primary cause of the 50 Hz oscillation on the half DC-link voltage. Based on the revealed mechanism, the allowable safe operating range of the half DC-bus voltage is deduced quantitatively. Finally, simulation tests are carried out in the MATLAB/Simulink environment. The obtained results verify the correctness of the theoretical derivation and the proposed operating range constraint. This work provides a theoretical reference for parameter design and stable operation of three-level grid-tied inverters under unbalanced grid faults.

Published in	American Journal of Energy Engineering (Volume 14, Issue 4)
DOI	10.11648/j.ajee.20261404.11
Page(s)	172-178
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2026. Published by Science Publishing Group

Keywords

Three-level Inverters, Dc-link Voltage, Negative-sequence Current, 50Hz Fluctuations

1. Introduction

Three-level grid-connected inverters are widely used in practice due to their reduced voltage stress and simpler control. Excessively high or low DC-side half-bus voltage can trigger overvoltage protection or overmodulation, respectively. Therefore, achieving a stable half-bus voltage is essential for optimal system performance. Recent literature has explored the mechanisms and methods for reducing positive and negative half-bus bias voltages

[1]	J. Zhou, J. O. Ojo, F. Tang, J. Haruna and P. C. Loh, "A Carrier-Based Discontinuous PWM for Single and Parallel Three-Level T-Type Converters With Neutral-Point Potential Balancing," IEEE Trans. on Ind. Appl., vol. 57, no. 5, pp. 5117-5127, Sept.-Oct. 2021. https://doi.org/10.1109/TIA.2021.3093500 View Article
[2]	G. Zhang, Y. Liu, X. Gu, W. Huang and W. Chen, "Carrier-Based PWM Strategy of Three-Level Neutral-Point-Clamped Inverter With Optimal Extension Mode," IEEE Trans. on Power Electron., vol. 40, no. 5, pp. 5821-5832, May 2025. https://doi.org/10.1109/TPEL.2025.3541278 View Article
[3]	L. Ha, H. Wang, M. Su, Y. Liu and Z. Zeng, "An Adaptive Power Decoupling Control for Three-Level NPC Converter Under Unbalanced Grid," IEEE J. Emerg. Sel. Topics Power Electron., vol. 13, no. 2, pp. 1945-1956, Apr. 2025. https://doi.org/10.1109/JESTPE.2025.3630328 View Article
[4]	W. Yan, R. Dian, Y. Li, Z. Liu and M. F. Elmorshedy, "DC-Link Balancing Control Based on ADRC for Three-Level NPC Inverter," IEEE Trans. on Power Electron., vol. 41, no. 3, pp. 3208-3219, Mar. 2026. https://doi.org/10.1109/TPEL.2026.3652633 View Article
[5]	J. Wang, Y. Gao and W. Jiang, "A Carrier-Based Implementation of Virtual Space Vector Modulation for Neutral-Point-Clamped Three-Level Inverter," IEEE Trans. Ind. Electron, vol. 64, no. 12, pp. 9580-9586, Dec. 2017. https://doi.org/10.1109/TIE.2017.2711550 View Article
[6]	I. M. Alsofyani and K. -B. Lee, "Simple Capacitor Voltage Balancing for Three-Level NPC Inverter Using Discontinuous PWM Method With Hysteresis Neutral-Point Error Band," IEEE Trans. on Power Electron., vol. 36, no. 11, pp. 12490-12503, Nov. 2021, https://doi.org/10.1109/TPEL.2021.3074957 View Article
[7]	W. Jiang, Q. Zhang, M. Mingna and X. Huang, "Low Frequency Harmonics Reduction Discontinuous PWM Strategy With Active Neutral Point Voltage Control for Neutral Point Clamped Three-Level Inverter," in IEEE Access, vol. 8, pp. 179128-179140, 2020. https://doi.org/10.1109/ACCESS.2020.3026668 View Article
[8]	J. Pou, R. Pindado, D. Boroyevich and P. Rodriguez, “Evaluation of the low-frequency neutral-point voltage oscillations in the three-level inverter,” IEEE Trans. Ind. Electron., vol. 52, no. 6, pp. 1582-1588, Dec. 2005.

[1-8]

, while also investigating the sources of 150Hz fluctuations in half-bus voltage

[9-15]

. Notably, this paper reveals that under certain operating conditions, such as under asymmetric voltage faults, there is a significant 50Hz fluctuation in the half-bus voltage, as shown in Figure 1. This phenomenon has not been observed in previous analyses. By thoroughly examining the sources of these 50Hz fluctuations, this paper offers a strategic approach to selecting the operating range of the half-bus voltage.

Download: Download full-size image

Figure 1. Half-bus voltage waveform of three-level inverters when inverters start to output negative-sequence current from 2s.

2. Analysis of 50Hz Current at the Midpoint of the Dc-link Capacitor

1) Mechanism Analysis

Download: Download full-size image

Figure 2. System diagram of the inverters with dc-link capacitor.

As can be seen from Figure 2, the relationship between the current flowing into the midpoint and the midpoint voltage is:

(1)

(2)

where C is the half-bus capacitor value.

Therefore, the variation of the DC-link midpoint voltage can be expressed as:

(3)

i_np represents the sum of phase currents when the switch state is 0

[9]

. When considering low-frequency components, the half-bus current i_np(t) at any given moment satisfies

[9]

(4)

where, v_a(t), v_b(t), v_c(t), i_a(t), i_b(t) and i_c(t) represent the modulated wave voltages and output current of phase a, phase b, and phase c, respectively.

Under asymmetric operating conditions, for the three-phase three-line system, the point of common coupling (PCC) voltage often contains positive, negative, and zero-sequence components. Output current contains positive and negative-sequence components. Therefore, (4) can be simplified as follows:

(5)

The three-phase inverter voltages are respectively:

(6)

The output currents are respectively:

(7)

The core of formula (5) lies in deriving the expression

and

. Taking

as an example, the derivation is as shown in Equation(A-1) of the Appendix. Where the expression of phase γ_b is

(8)

Assume,

(9)

Equation(A-1) can be simplified as

(10)

According to Fourier series,

can be expressed as:

(11)

This article primarily analyzes the sources of 50Hz fluctuations, thus emphasizing the analysis of direct current (DC), fundamental frequency, and second-harmonic components, while temporarily disregarding the impact of other components.

The coefficient of the DC component a₀_bin (12) is：

(12)

The cosine-term coefficient of the fundamental component a₁_b is derived as

(13)

The sine-term coefficient of the fundamental component b₁_b is derived as

(14)

The cosine-term coefficient of the second harmonic component a₂_bis derived as

(15).

The sine-term coefficient of the second-harmonic component b₂_b is derived as

(16)

2) Derivation of the output current from the midpoint of the dc-link capacitor

The absolute values of the three-phase inverter voltage are respectively:

(17)

Thus (18)~(20) can obtained.

(18)

The derivation of Equation (18) is given in Eq. (A-2) of the Appendix.

(19)

(20)

The summarized result of M is given by Eq. (A-3) in the Appendix.

The 50Hz component in the half-bus voltage is shown as (21).

(21)

where:

(22)

(23)

(24)

(25)

(26)

(27)

(28)

(29)

3. Influencing Factors of 50Hz Fluctuation

Under the balanced PCC voltage, i.e.,

, can be simplified as:

(30)

According to Eq.(30), the magnitude of the 50Hz half-bus voltage oscillation is directly proportional to the product of the positive-sequence voltage and the negative-sequence current, while being inversely proportional to the capacitance value on the DC side. Therefore, reducing the negative-sequence current or increasing the DC-link capacitor value can both help reduce oscillation of the DC-link midpoint voltage.

Under asymmetric PCC voltage conditions, apart from the negative-sequence component in the output current, the voltage also contains the negative-sequence component. Both of these will affect the amplitude of the half-bus voltage fluctuation. A detailed analysis will be presented throughout the full text.

Abbreviations

PCC	Point of Common Coupling

Author Contributions

Cheng Luo: Conceptualization, Resources.

Jianbo Cao: Formal analysis, Methodology.

Mi Qi: Investigation.

Dapeng Lu: Validation.

Hongwei Zhou: Supervision.

Funding

This work was supported in part by the Major Science and Technology Program of the Department of Science and Technology of Xinjiang Uygur Autonomous Region, China, under Grant 2022A01004-5.

Conflicts of Interest

The authors declare no conflicts of interest.

Appendix

(A-1)

(A-2)

(A-3)

References

[1]	J. Zhou, J. O. Ojo, F. Tang, J. Haruna and P. C. Loh, "A Carrier-Based Discontinuous PWM for Single and Parallel Three-Level T-Type Converters With Neutral-Point Potential Balancing," IEEE Trans. on Ind. Appl., vol. 57, no. 5, pp. 5117-5127, Sept.-Oct. 2021. https://doi.org/10.1109/TIA.2021.3093500
[2]	G. Zhang, Y. Liu, X. Gu, W. Huang and W. Chen, "Carrier-Based PWM Strategy of Three-Level Neutral-Point-Clamped Inverter With Optimal Extension Mode," IEEE Trans. on Power Electron., vol. 40, no. 5, pp. 5821-5832, May 2025. https://doi.org/10.1109/TPEL.2025.3541278
[3]	L. Ha, H. Wang, M. Su, Y. Liu and Z. Zeng, "An Adaptive Power Decoupling Control for Three-Level NPC Converter Under Unbalanced Grid," IEEE J. Emerg. Sel. Topics Power Electron., vol. 13, no. 2, pp. 1945-1956, Apr. 2025. https://doi.org/10.1109/JESTPE.2025.3630328
[4]	W. Yan, R. Dian, Y. Li, Z. Liu and M. F. Elmorshedy, "DC-Link Balancing Control Based on ADRC for Three-Level NPC Inverter," IEEE Trans. on Power Electron., vol. 41, no. 3, pp. 3208-3219, Mar. 2026. https://doi.org/10.1109/TPEL.2026.3652633
[5]	J. Wang, Y. Gao and W. Jiang, "A Carrier-Based Implementation of Virtual Space Vector Modulation for Neutral-Point-Clamped Three-Level Inverter," IEEE Trans. Ind. Electron, vol. 64, no. 12, pp. 9580-9586, Dec. 2017. https://doi.org/10.1109/TIE.2017.2711550
[6]	I. M. Alsofyani and K. -B. Lee, "Simple Capacitor Voltage Balancing for Three-Level NPC Inverter Using Discontinuous PWM Method With Hysteresis Neutral-Point Error Band," IEEE Trans. on Power Electron., vol. 36, no. 11, pp. 12490-12503, Nov. 2021, https://doi.org/10.1109/TPEL.2021.3074957
[7]	W. Jiang, Q. Zhang, M. Mingna and X. Huang, "Low Frequency Harmonics Reduction Discontinuous PWM Strategy With Active Neutral Point Voltage Control for Neutral Point Clamped Three-Level Inverter," in IEEE Access, vol. 8, pp. 179128-179140, 2020. https://doi.org/10.1109/ACCESS.2020.3026668
[8]	J. Pou, R. Pindado, D. Boroyevich and P. Rodriguez, “Evaluation of the low-frequency neutral-point voltage oscillations in the three-level inverter,” IEEE Trans. Ind. Electron., vol. 52, no. 6, pp. 1582-1588, Dec. 2005.
[9]	J. S. Lee and K. B. Lee, “New modulation techniques for a leakage current reduction and a neutral-point voltage balance in transformerless photovoltaic systems using a three-level inverter,”IEEE Trans. Power Electron., vol. 29, no. 4, pp. 1720–1732, Apr. 2014.
[10]	P. Alemi, Y.-C. Jeung, and D.-C. Lee, “DC-link capacitance minimization in T-type three-level AC/DC/AC PWM converters,”IEEE Trans. Power Electron., vol. 62, no. 3, pp. 1382–1391, Mar. 2015. https://doi.org/10.1109/TIE.2014.2345354
[11]	X. Wu, G. Tan, Z. Ye, G. Yao, Z. Liu, and G. Liu, “A virtual-spacevector PWM for three-level neutral-point-clamped inverter with unbalanced DC-links,” IEEE Trans. Power Electron., vol. 33, no. 3, pp. 2630–2642, Mar. 2018. https://doi.org/10.1109/TPEL.2017.2692272
[12]	T. Ghennam, E. M. Berkouk, and B. Francois, “A novel space-vector current control based on circular hysteresis areas of a three-phase neutral point-clamped inverter,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2669–2678, Aug. 2010.
[13]	S. K. Giri, S. Chakrabarti, S. Banerjee, and C. Chakraborty, “A carrier-based PWM scheme for neutral point voltage balancing in three-level inverter extending to full power factor range,” IEEE Trans. Ind. Electron., vol. 64, no. 3, pp. 1873–1883, Mar. 2017. https://doi.org/10.1109/TIE.2016.2624721
[14]	R. A. Ghaderloo, Y. Shen, H. Wang and A. Khaligh, "Carrier-Based Continuous PWM for Compensating the Effect of Unbalanced and Oscillating Neutral-Point Voltage in T-Type Inverter," IEEE Trans. Transp. Electrific., vol. 11, no. 4, pp. 2312-2323, Aug. 2025. https://doi.org/10.1109/TTE.2025.3571719
[15]	G. Zhang, Y. Liu, X. Gu, W. Huang and W. Chen, "Carrier-Based PWM Strategy of Three-Level Neutral-Point-Clamped Inverter With Optimal Extension Mode," IEEE Open J. Power Electron., vol.7, pp.1738-1752, May 2026. https://doi.org/10.1109/OJPEL.2026.3695632

Cite This Article

Plain Text BibTeX RIS

APA Style

Luo, C., Cao, J., Qi, M., Lu, D., Zhou, H. (2026). Analysis of 50 Hz Neutral-Point Voltage Fluctuation of DC-Link Capacitors for Three-level Inverters. American Journal of Energy Engineering, 14(4), 172-178. https://doi.org/10.11648/j.ajee.20261404.11

Copy | Download

ACS Style

Luo, C.; Cao, J.; Qi, M.; Lu, D.; Zhou, H. Analysis of 50 Hz Neutral-Point Voltage Fluctuation of DC-Link Capacitors for Three-level Inverters. Am. J. Energy Eng. 2026, 14(4), 172-178. doi: 10.11648/j.ajee.20261404.11

Copy | Download

AMA Style

Luo C, Cao J, Qi M, Lu D, Zhou H. Analysis of 50 Hz Neutral-Point Voltage Fluctuation of DC-Link Capacitors for Three-level Inverters. Am J Energy Eng. 2026;14(4):172-178. doi: 10.11648/j.ajee.20261404.11

Copy | Download

@article{10.11648/j.ajee.20261404.11,
  author = {Cheng Luo and Jianbo Cao and Mi Qi and Dapeng Lu and Hongwei Zhou},
  title = {Analysis of 50 Hz Neutral-Point Voltage Fluctuation of 
DC-Link Capacitors for Three-level Inverters},
  journal = {American Journal of Energy Engineering},
  volume = {14},
  number = {4},
  pages = {172-178},
  doi = {10.11648/j.ajee.20261404.11},
  url = {https://doi.org/10.11648/j.ajee.20261404.11},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.ajee.20261404.11},
  abstract = {Grid-tied inverters serve as key equipment to guarantee the reliable operation of modern power systems dominated by renewable energy sources. Under asymmetric grid conditions, injecting negative-sequence current is a widely adopted control strategy for three-level grid-connected inverters to suppress grid voltage unbalance. However, this paper discovers an unreported phenomenon that obvious 50 Hz fluctuations arise in the half DC-bus voltage of three-level inverters during negative-sequence current injection. To clarify the generation mechanism of this voltage fluctuation, Fourier series decomposition is employed to analyze the coupling relationship between sequence components of voltage and current. The theoretical analysis demonstrates that the interaction between negative-sequence voltage and negative-sequence current constitutes the primary cause of the 50 Hz oscillation on the half DC-link voltage. Based on the revealed mechanism, the allowable safe operating range of the half DC-bus voltage is deduced quantitatively. Finally, simulation tests are carried out in the MATLAB/Simulink environment. The obtained results verify the correctness of the theoretical derivation and the proposed operating range constraint. This work provides a theoretical reference for parameter design and stable operation of three-level grid-tied inverters under unbalanced grid faults.},
 year = {2026}
}

Copy | Download

TY  - JOUR
T1  - Analysis of 50 Hz Neutral-Point Voltage Fluctuation of 
DC-Link Capacitors for Three-level Inverters
AU  - Cheng Luo
AU  - Jianbo Cao
AU  - Mi Qi
AU  - Dapeng Lu
AU  - Hongwei Zhou
Y1  - 2026/11/10
PY  - 2026
N1  - https://doi.org/10.11648/j.ajee.20261404.11
DO  - 10.11648/j.ajee.20261404.11
T2  - American Journal of Energy Engineering
JF  - American Journal of Energy Engineering
JO  - American Journal of Energy Engineering
SP  - 172
EP  - 178
PB  - Science Publishing Group
SN  - 2329-163X
UR  - https://doi.org/10.11648/j.ajee.20261404.11
AB  - Grid-tied inverters serve as key equipment to guarantee the reliable operation of modern power systems dominated by renewable energy sources. Under asymmetric grid conditions, injecting negative-sequence current is a widely adopted control strategy for three-level grid-connected inverters to suppress grid voltage unbalance. However, this paper discovers an unreported phenomenon that obvious 50 Hz fluctuations arise in the half DC-bus voltage of three-level inverters during negative-sequence current injection. To clarify the generation mechanism of this voltage fluctuation, Fourier series decomposition is employed to analyze the coupling relationship between sequence components of voltage and current. The theoretical analysis demonstrates that the interaction between negative-sequence voltage and negative-sequence current constitutes the primary cause of the 50 Hz oscillation on the half DC-link voltage. Based on the revealed mechanism, the allowable safe operating range of the half DC-bus voltage is deduced quantitatively. Finally, simulation tests are carried out in the MATLAB/Simulink environment. The obtained results verify the correctness of the theoretical derivation and the proposed operating range constraint. This work provides a theoretical reference for parameter design and stable operation of three-level grid-tied inverters under unbalanced grid faults.
VL  - 14
IS  - 4
ER  -

Copy | Download

Author Information

Cheng Luo

TBEA Xi’an Electric Technology Co., Ltd., Xi’an, China

Contact Email

http://orcid.org/0000-0002-0220-4045
Jianbo Cao

TBEA Xi’an Electric Technology Co., Ltd., Xi’an, China

Contact Email

http://orcid.org/0009-0005-9451-9368
Mi Qi

TBEA Xi’an Electric Technology Co., Ltd., Xi’an, China
Dapeng Lu

TBEA Xi’an Electric Technology Co., Ltd., Xi’an, China
Hongwei Zhou

TBEA Xi’an Electric Technology Co., Ltd., Xi’an, China

Download PDF

Submit an Article

Plain Text BibTeX RIS

APA Style

Luo, C., Cao, J., Qi, M., Lu, D., Zhou, H. (2026). Analysis of 50 Hz Neutral-Point Voltage Fluctuation of DC-Link Capacitors for Three-level Inverters. American Journal of Energy Engineering, 14(4), 172-178. https://doi.org/10.11648/j.ajee.20261404.11

Copy | Download

ACS Style

Luo, C.; Cao, J.; Qi, M.; Lu, D.; Zhou, H. Analysis of 50 Hz Neutral-Point Voltage Fluctuation of DC-Link Capacitors for Three-level Inverters. Am. J. Energy Eng. 2026, 14(4), 172-178. doi: 10.11648/j.ajee.20261404.11

Copy | Download

AMA Style

Luo C, Cao J, Qi M, Lu D, Zhou H. Analysis of 50 Hz Neutral-Point Voltage Fluctuation of DC-Link Capacitors for Three-level Inverters. Am J Energy Eng. 2026;14(4):172-178. doi: 10.11648/j.ajee.20261404.11

Copy | Download

@article{10.11648/j.ajee.20261404.11,
  author = {Cheng Luo and Jianbo Cao and Mi Qi and Dapeng Lu and Hongwei Zhou},
  title = {Analysis of 50 Hz Neutral-Point Voltage Fluctuation of 
DC-Link Capacitors for Three-level Inverters},
  journal = {American Journal of Energy Engineering},
  volume = {14},
  number = {4},
  pages = {172-178},
  doi = {10.11648/j.ajee.20261404.11},
  url = {https://doi.org/10.11648/j.ajee.20261404.11},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.ajee.20261404.11},
  abstract = {Grid-tied inverters serve as key equipment to guarantee the reliable operation of modern power systems dominated by renewable energy sources. Under asymmetric grid conditions, injecting negative-sequence current is a widely adopted control strategy for three-level grid-connected inverters to suppress grid voltage unbalance. However, this paper discovers an unreported phenomenon that obvious 50 Hz fluctuations arise in the half DC-bus voltage of three-level inverters during negative-sequence current injection. To clarify the generation mechanism of this voltage fluctuation, Fourier series decomposition is employed to analyze the coupling relationship between sequence components of voltage and current. The theoretical analysis demonstrates that the interaction between negative-sequence voltage and negative-sequence current constitutes the primary cause of the 50 Hz oscillation on the half DC-link voltage. Based on the revealed mechanism, the allowable safe operating range of the half DC-bus voltage is deduced quantitatively. Finally, simulation tests are carried out in the MATLAB/Simulink environment. The obtained results verify the correctness of the theoretical derivation and the proposed operating range constraint. This work provides a theoretical reference for parameter design and stable operation of three-level grid-tied inverters under unbalanced grid faults.},
 year = {2026}
}

Copy | Download

TY  - JOUR
T1  - Analysis of 50 Hz Neutral-Point Voltage Fluctuation of 
DC-Link Capacitors for Three-level Inverters
AU  - Cheng Luo
AU  - Jianbo Cao
AU  - Mi Qi
AU  - Dapeng Lu
AU  - Hongwei Zhou
Y1  - 2026/11/10
PY  - 2026
N1  - https://doi.org/10.11648/j.ajee.20261404.11
DO  - 10.11648/j.ajee.20261404.11
T2  - American Journal of Energy Engineering
JF  - American Journal of Energy Engineering
JO  - American Journal of Energy Engineering
SP  - 172
EP  - 178
PB  - Science Publishing Group
SN  - 2329-163X
UR  - https://doi.org/10.11648/j.ajee.20261404.11
AB  - Grid-tied inverters serve as key equipment to guarantee the reliable operation of modern power systems dominated by renewable energy sources. Under asymmetric grid conditions, injecting negative-sequence current is a widely adopted control strategy for three-level grid-connected inverters to suppress grid voltage unbalance. However, this paper discovers an unreported phenomenon that obvious 50 Hz fluctuations arise in the half DC-bus voltage of three-level inverters during negative-sequence current injection. To clarify the generation mechanism of this voltage fluctuation, Fourier series decomposition is employed to analyze the coupling relationship between sequence components of voltage and current. The theoretical analysis demonstrates that the interaction between negative-sequence voltage and negative-sequence current constitutes the primary cause of the 50 Hz oscillation on the half DC-link voltage. Based on the revealed mechanism, the allowable safe operating range of the half DC-bus voltage is deduced quantitatively. Finally, simulation tests are carried out in the MATLAB/Simulink environment. The obtained results verify the correctness of the theoretical derivation and the proposed operating range constraint. This work provides a theoretical reference for parameter design and stable operation of three-level grid-tied inverters under unbalanced grid faults.
VL  - 14
IS  - 4
ER  -

Copy | Download